1. Field of the Invention
The present invention relates to a solid-state image pickup device having a plurality of pixels each including a photoelectric conversion unit and a plurality of transistors, an image pickup apparatus using the solid-state image pickup device, and a scanning circuit used in the solid-state image pickup device or the like.
2. Related Background Art
In recent years, many studies have enthusiastically been made for image sensors called CMOS image sensors in which a photoelectric conversion signal is read by not a CCD (Charge-Coupled Device) but a MOS transistor. The CMOS image sensor is used particularly for a portable image sensor in terms of easy on-chip integration of a peripheral circuit because of high compatibility with a CMOS logic LSI process, low driving voltage, and low power consumption.
FIG. 1 is an equivalent circuit diagram showing one pixel of a solid-state image pickup device disclosed in, e.g., Japanese Patent Application Laid-Open No. 4-61573 and the periphery of the solid-state image pickup device. As shown in FIG. 1, each pixel of a conventional solid-state image pickup device comprises a photodiode 1 serving as a photoelectric conversion unit, an amplifier MOSFET 2 for amplifying the charges accumulated in the photodiode 1, a transfer MOSFET 3 for transferring charges from the photodiode 1 to the gate of the amplifier MOSFET 2, a selector MOSFET for turning on the amplifier MOSFET 2, a reset MOSFET for resetting the input node of the amplifier MOSFET 2, a vertical signal line 7 to which a signal amplified by the amplifier MOSFET 2 is read out, and a vertical scanning circuit 6 for outputting a control signal for switching the level between high and low levels to the gates of the amplifier MOSFET 2 and transfer MOSFET 3.
In the pixel shown in FIG. 1, the photodiode 1 converts incident light into an electrical signal, and accumulates the electrical signal. When the vertical scanning circuit 6 supplies a high-level control signal to the gate of the transfer MOSFET 3, the charges accumulated in the photodiode 1 are transferred to the amplifier MOSFET 2 at a predetermined timing. The signal amplified by the amplifier MOSFET 2 is read out to the vertical signal line 7.
FIG. 2 is a partial circuit diagram showing a portion for outputting a control signal ΦTX supplied from the vertical scanning circuit 6 to the transfer MOSFET 3. As shown in FIG. 2, the vertical scanning circuit 6 uses, e.g., a CMOS inverter for outputting the control signal ΦTX.
Two transistors constituting the CMOS inverter have a power supply VH for outputting a high-level control signal, and a power supply VL for outputting a low-level control signal. The ON/OFF states of the two transistors are switched to output a signal based on the potentials of these power supplies, and thus the ON/OFF state of the gate of the transfer transistor is switched.
The potential of each power supply is determined in accordance with a source-drain breakdown voltage VDSX of each transistor. For example, when the breakdown voltage VDSX of each transistor is 5 V, the voltage values of the power supplies VH and VL are set to 5 V and 0 V, respectively.
However, charges transferred to the amplifier transistor include a dark current component in the photodiode or transfer transistor. If charges include a large amount of dark current component, the S/N ratio of an amplified signal read out to the vertical signal line decreases. If light is incident on the Si—SiO2 interface of the gate oxide layer of a transistor forming the transfer transistor, charges are generated. These charges are also superposed on charges transferred from the photodiode, resulting in a lower S/N ratio.
To prevent this, a dark current in the transfer transistor must be stopped from being generated when the transfer transistor having a MOS transistor or the like is interposed between the photodiode and the amplifier transistor. To suppress a dark current generated in the transfer transistor, holes are sufficiently accumulated near the control electrode of the MOS transistor while the photodiode accumulates charges.
When holes are sufficiently accumulated near the control electrode of the MOS transistor, even if electron-hole pairs are generated below the gate oxide layer of the transfer MOSFET 3, the electrons quickly recombine with the accumulated holes, so no dark current flows.
To sufficiently accumulate holes near the control electrode of the MOS transistor, channel may be prevented from being formed in the MOS transistor serving as the transfer transistor. However, such the prevention of formation of the channel in the MOS transistor serving as the transfer transistor degrades the charge transfer characteristic from the photodiode. As a result, an afterimage or the like is generated in an obtained image.
A pixel in which a photodiode is depleted to reset the charges in the photodiode immediately after charges are transferred readily suffers an afterimage and must be improved.
In general, the MOS transistor of a transfer transistor, and a MOS transistor which constitutes a reset switch or selector switch for another purpose are often simultaneously formed. For this reason, channel formation also is prevented in the other MOS transistor, and the performance of the transistor other than the transfer transistor decreases.
As the MOS transistor shrinks in feature size, the power supply voltage applied to a circuit decreases. It is therefore not preferable to prevent channel formation in the MOS transistor in this sense.
Another conventional art will be described. FIG. 3 shows part of a conventional scanning circuit. A case in which this scanning circuit is applied to the vertical scanning circuit of the solid-state image pickup device in FIG. 1 will be explained. An arbitrary row in a pixel area is selected by an output ΦSR from a shift register, and control signals ΦSEL and ΦRES are generated by logical operation between the output ΦSR and an external input pulse ΦSEL′. ΦSEL is supplied to a selector MOSFET 4 for turning on an amplifier MOSFET 2 of a pixel, whereas ΦRES is supplied to a reset MOSFET 5 for resetting the input node of the amplifier MOSFET 2. ΦTX is supplied to a transfer MOSFET 3 for transferring charges from a photodiode to the amplifier MOSFET 2. The shift register shifts a scanning pulse to sequentially read out signals in units of rows, finally obtaining a 1-frame image signal.
In the conventional scanning circuit shown in FIG. 3, the shift register and pulse output circuit operate at the same power supply voltage, so a plurality of output control signals ΦSEL and ΦRES are output pulses within the same voltage range. This poses various limitations.